Instantaneous-power-based busbar numerical differential protection

Moreno Vásquez, Francis Arody; Silva, Kleber Melo e

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Campo DC	Valor	Idioma
dc.contributor.author	Moreno Vásquez, Francis Arody	-
dc.contributor.author	Silva, Kleber Melo e	-
dc.date.accessioned	2019-12-06T12:12:32Z	-
dc.date.available	2019-12-06T12:12:32Z	-
dc.date.issued	2019	-
dc.identifier.citation	VASQUEZ, Francis A. Moreno; SILVA, Kleber Melo e. Instantaneous-power-based busbar numerical differential protection. IEEE Transactions on Power Delivery, v. 34, n. 2, abr. 2019. DOI: 10.1109/TPWRD.2019.2896035. Disponível em: https://ieeexplore.ieee.org/document/8628998.	pt_BR
dc.identifier.uri	https://repositorio.unb.br/handle/10482/35913	-
dc.language.iso	Inglês	pt_BR
dc.publisher	IEEE	pt_BR
dc.rights	Acesso Restrito	pt_BR
dc.title	Instantaneous-power-based busbar numerical differential protection	pt_BR
dc.type	Artigo	pt_BR
dc.subject.keyword	Proteção diferencial	pt_BR
dc.subject.keyword	Potência instantânea	pt_BR
dc.identifier.doi	10.1109/TPWRD.2019.2896035	pt_BR
dc.relation.publisherversion	https://ieeexplore.ieee.org/document/8628998	pt_BR
dc.description.abstract1	This paper presents a new method for busbar differential protection based on the instantaneous power concept. In order to do so, the instantaneous power per phase of each network element connected to the busbar is computed by using the instantaneous current values and a voltage memory action strategy. The performance of the proposed technique is compared to one of the traditional instantaneous-current-based differential protection algorithms, which is widely used by manufacturers of commercial relays. Both internal and external faults, as well as evolving external-to-internal faults, were simulated in a power substation with double-bus single-breaker configuration using the software ATPDraw. The obtained results reveal that the proposed algorithm is twice or more faster than the traditional instantaneous-currentbased algorithm for most of the internal and evolving external-tointernal faults, while ensuring secure operation for external ones even when severe current transformer (CT) saturation takes place, through a new harmonic power restraint strategy. Also, since the proposed method provides faster fault detection time, the requirements for CT time to saturate may be alleviated, guaranteeing correct operation even in the case of early CT saturation.	pt_BR
dc.rights.holder	© 2019 IEEE	-
dc.identifier.orcid	https://orcid.org/0000-0001-9880-3984	pt_BR
dc.identifier.orcid	https://orcid.org/0000-0003-0847-4545	pt_BR
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