Skip navigation
Please use this identifier to cite or link to this item: http://repositorio.unb.br/handle/10482/11086
Files in This Item:
File Description SizeFormat 
ARTIGO_ExplorationPowerPerformance.pdf3,17 MBAdobe PDFView/Open
Title: Exploration of the power-performance tradeoff through parameterization of FPGA-based multiprocessor systems
Authors: Göhringer, Diana
Obie, Jonathan
Braga, André Luiz Sordi
Hübner, Michael
Llanos Quintero, Carlos Humberto
Becker, Jürgen
Assunto:: Processamento eletrônico de dados
Issue Date: 2011
Publisher: Hindawi Publishing Corporation
Citation: GOHRINGER, Diana et al. Exploration of the power-performance tradeoff through parameterization of FPGA-based multiprocessor systems. International Journal of Reconfigurable Computing, v. 2001, artigo n. 865402, p. 17, 2011. Disponível em:<http://www.hindawi.com/journals/ijrc/2011/985931/>. Acesso em: 30 ago. 2012.
Abstract: The design space of FPGA-based processor systems is huge, because many parameters can be modified at design- and runtime to achieve an efficient system solution in terms of performance, power and energy consumption. Such parameters are, for example, the number of processors and their configurations, the clock frequencies at design time, the use of dynamic frequency scaling at runtime, the application task distribution, and the FPGA type and size. The major contribution of this paper is the exploration of all these parameters and their impact on performance, power dissipation, and energy consumption for four different application scenarios. The goal is to introduce a first approach for a developer's guideline, supporting the choice of an optimized and specific system parameterization for a target application on FPGA-based multiprocessor systems-on-chip. The FPGAs used for these explorations were Xilinx Virtex-4 and Xilinx Virtex-5. The performance results were measured on the FPGA while the power consumption was estimated using the Xilinx X Power Analyzer tool. Finally, a novel runtime adaptive multiprocessor architecture for dynamic clock frequency scaling is introduced and used for the performance, power and energy consumption evaluations.
Licença:: Copyright © 2011 Diana Göhringer et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Fonte: http://www.hindawi.com/journals/ijrc/2011/985931/. Acesso em: 30 ago. 2012.
DOI: https://dx.doi.org/10.1155/2011/985931
Appears in Collections:Artigos publicados em periódicos e afins

Show full item record " class="statisticsLink btn btn-primary" href="/jspui/handle/10482/11086/statistics">



This item is licensed under a Creative Commons License Creative Commons